The chips which include serial and parallel I/O ports, timers and event counters,arithmetic chips, interrupt controllers, DMA controllers, and memory controllers. These components are defined according to bus compatibility, supplier, model number, technology and packaging, and price and availability.; 包括串行和并行輸入輸出端口、定時器和事件計數(shù)器、運算芯片、中斷控制器、DMA控制器和存儲器控制 器的若干芯片。這些元器件是根據(jù)下列因素確定的:總線兼容性、廠商、型號、工藝、 組裝、價格和可用性。